Role: Sr. Design Lead

Location Santa Clara CA

Exp 8

All are 100% onsite, most of the Intel roles need onsite. Lap work actually so they need people working from office.

Salary - As per market, but competitive.

Sr. Design Lead (1) in USA

• Hands-on Synthesis/P&R , STA/Timing Closure, Logic Equivalence Check, VCLP, IR/EM , Physical Verification analysis/closure at Partition and Top Level.
• Experience in providing technical leadership and guidance to engineers in a ODC setup.
• Experience in acting as a technical liaison between the Project teams and the ODC engineering members
• Hands-on experience in solving Flow related issues to un-gate ODC Engineering team
• Ability to summarize the issues (bi-weekly or Weekly) , Possible solutions being tested with ETA and drive the issues to closure.

Tool & Scripting knowledge Requirement : Synopsys Fusion Compiler, Synopsys Primetime, Cadence Conformal LEC, Ansys Redhawk SC, Calibre or ICV LVS/DRC, TCL/Perl/Python

Job Type: Full-time

Pay: $120,000.00 - $130,000.00 per year

Benefits:

• 401(k)
• Dental insurance
• Health insurance

Experience level:

• 11 years
• 5 years
• 6 years

Schedule:

• 10 hour shift

Experience:

• UI: 2 years (Preferred)
• UX: 1 year (Preferred)

Ability to Commute:

• Santa Clara, CA 95054 (Required)

Ability to Relocate:

• Santa Clara, CA 95054: Relocate before starting work (Required)

Work Location: In person