*Job Title: Sr. Silicon Design Engineer

*Location: Santa Clara, CA 95054

*Duration: 6 months contract, Full-Time

Job Description:

· This is a Physical Design Engineering role that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification

Responsibilities:

· Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams

· Proficiency in Python and/or Perl is required. Additional languages are a plus.

· Versatility with scripts to automate design flow, and quality checks.

· Experience in automated synthesis and timing driven place and route of RTL blocks (Verilog experience preferred) for high speed Datapath and control logic applications.

· Experience in automated design flows for clock tree synthesis, clock and power gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction.

· Strong background in digital circuit techniques, efficient and robust implementation topologies for logic functions, logic optimization, and transistor level circuit topologies for high speed, low power applications

· Experience in floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery.

· Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation

Experience:

• 5 years of experience

Skills:

· This engineer will work on high-speed multi-gigabit SerDes PHY designs.

· This includes automated synthesis and timing driven place and route of RTL blocks for high speed Datapath and control logic applications, automated design flows for clock tree synthesis, clock and power gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction.

· You will also support floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery.

Education:

• Engineering degree in Computer Engineering or Computer Science with 5 years of hands-on experience in system software development

About US Tech Solutions:

US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions, please visit www.ustechsolutions.com.

About the Company:
US Tech Solutions

US Tech Solutions is a global firm supplying IT services, on-demand talent sourcing and workforce management solutions. A certified Minority Business Employer, we are a partner to over 85 of the Fortune 500® across industries, delivering successful talent acquisition and governance programs since 2000.A global footprint, supplemented by local offices, means we’re small enough to care with the strength to deliver. We have a growing community of 9,000 people on assignment and an active database of 23 million candidates. Partnering with USTECH SOLUTIONS brings on-demand talent within reach. With a client retention rate of 97%, US Tech Solutions has demonstrated the ability to consistently provide exceptional service.As a minority-owned business we’re proud to promote the values and rewards of diversity and inclusion. Diversity is a key component of our corporate culture, as evidenced by the fact that both our leadership team and broader workforce are highly diverse. We pride ourselves in our ability to attract and retain a diverse workforce that is a reflection of the needs of our clients and of the marketplace at large.

Company Size:
2,500 to 4,999 employees

Industry:
Staffing/Employment Agencies

Founded:
2000

Website:
https://ustechsolutions.com/