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The Advanced Design Library Technology (ADLT) group plays a leading role in digital logic design pathfinding, definition and development for Intel's next generation technologies. As a Digital Library Vertical Lead, you will be working closely with experts from the ADLT team and partnering organizations in Advanced Design, Design Enablement and Technology Development across the entire digital design stack. Technical work includes device/cell level optimization, standard cell library definition and design, block level PPA implementation and optimization, and Post-Si learning. This is a highly visible technical role with wide exposure and high impact potential across all facets of digital design.Your responsibilities will include:
- Interfacing with external customers and partners.- Defining, tracking and coordinating various DTCO (Design-Technology Co-Optimization) activities.- Defining and maintaining technology PPA targets and status.- Defining test chip content and tracking Post-Si status on yield/performance/Vmin.- Defining and developing methodologies to track and report Pre-Si and Post-Si metrics.
Candidate must exhibit the following behavioral traits/skills:
- Track record of individual technical contributions and/or technical leadership across a team.- Ability to effectively communicate technical results to technical and executive leadership.
#DesignEnablement
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:
Candidate must possess a BS degree with 9 years of experience or MS degree with 6 months of experience or Ph.D. degree with 4 years of experience in Electrical Engineering, Computer Engineering, or related field.
6 years of experience in the following:
- Digital design in advanced nodes.Preferred Qualifications:
8 years of experience in the following:
- Standard cell library definition and design .- DTCO in the digital design space.- Optimizations for yield/performance/Vmin improvements.
- Test chip definition and Post-Si data analysis.
Other
Semiconductor
$91k-114k (estimate)
04/04/2024
06/03/2024
intel.com
SANTA CLARA, CA
>50,000
1968
Public
PATRICK GELSINGER
>$50B
Semiconductor
Intel is a California based technology company that designs and builds processors, motherboards, electronic disk, storage devices and mobile chips.
The job skills required for Digital Design Lead (Standard Cell Library) include Leadership, Packaging, Communicates Effectively, etc. Having related job skills and expertise will give you an advantage when applying to be a Digital Design Lead (Standard Cell Library). That makes you unique and can impact how much salary you can get paid. Below are job openings related to skills required by Digital Design Lead (Standard Cell Library). Select any job title you are interested in and start to search job requirements.
The following is the career advancement route for Digital Design Lead (Standard Cell Library) positions, which can be used as a reference in future career path planning. As a Digital Design Lead (Standard Cell Library), it can be promoted into senior positions as a Graphic Design Manager that are expected to handle more key tasks, people in this role will get a higher salary paid than an ordinary Digital Design Lead (Standard Cell Library). You can explore the career advancement for a Digital Design Lead (Standard Cell Library) below and select your interested title to get hiring information.