This position is for a Sr. Failure Analysis Engineer. (On-Site 5 days/week)
10 years related experience required in the computer networking industry.
Minimum BSEE, BSCS, BSCE, or BSET.
12 months extension contract
$46/hr
Santa Clara, CA. On-Site 5 days/week)
Expert technical skills in the manufacturing test environment, both PCBA and box build/system level assemblies.
Strong Linux OS, Tcl, Expect, Shell Script, Python, Network Switch, Terminal Server, and PDU)
Demonstrated ability at hardware debugging to component level and fault isolation is mandatory.

Familiarity with test engineering principles, methods and industry standard best practices in a manufacturing test environment including JTAG, boundary scan, 2-corner and 4-corner testing.
Knowledge of Salesforce, JIRA and SAP desired.
Ability to read schematics and view board files (Allegro Viewer and Cadence PCB Design)
Primary Tasks:
Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team
Resolve escalated RMA s by determining the hardware root cause of the failure issue.
Track and report on RMA failure trends by product and cause to the Tech Op s team.
Track the progress of all in-progress RMA s requiring FA and prioritizing accordingly.
Monitor process and product corrective actions to ensure changes were in fact effective in improving the product.
Maintain accurate data entry into SAP and Salesforce database tools