Roles and Responsibilities:

Job Summary/Overview:

As a Yield Analysis Engineer at Samsung Austin Semiconductor, you will own key high volume 14nm FinFET products. The individual will collaborate with customer and internal teams to monitor health of line and trace yield deviations to closure.

Specific Job Duties:

• Yield event closure and defense line: Drive detection source to closure by confirmation of defense line effectiveness.
• Customer yield management: Prepare customer material set, cross-functional alignment on overall message, and active meeting participation required.
• Commonality: Daily wafer testing (EDS) map review and yield summary, analytical deep dives (root cause for bin and zonal shifts), dog tool analysis, and integrated issues resulting from multiple change points to identify source of yield degradation or opportunity
• Change point analyses: YA is responsible for all change point analyses for spec release for both EDS and FT yield. This includes deep dives of change points to provide specific bin / zonal issues with failing change point proposals.
Shift: 1st Shift, 8:00am-5:00pm
Skills and Qualifications:

Education, Training, Certification(s) and Minimum years of experience required

BS required MS EE or ChemE preferred with >7yrs experience as Device and/or Process Eng (understanding of semiconductor process, coding, process integration, device physics)

Knowledge, Skills, Abilities, Software, and Tools

• Experience in a high volume production environment and demonstration of strong yield analysis capability (preferred analysis tools / coding: Spotfire / JMP / R / Python).
• RF Product, Process Integration & Device Physics experiences are prefered.
• Experience with FinFET technology and related production flow are desired.
• Strong written and verbal communication skills required as engineer will report to Exec level and expected to engage directly with end customer.
• Integrity, excellent teamwork, flexibility, strong work ethic, and a sense of urgency on the job.