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Design the electrical requirement and drew schematics of Rivos’s product. Work on schematic
capture, board block design, define routing constraints, layout review and simulation. Responsible for system design for chip bringup boards and final systems, lab bring-up, test, and debugging. Perform co-designing with power and signal integrity analysis specialists. Perform high-speed interface characterization and debugging system level issues. Resolve system level issues related to silicon validation and characterization.
\nEducation:
Worksite: 3315 Scott Blvd., Floor 4, Santa Clara, CA 95054
Applicant Instructions: Include job code 91642 in reply. EOE.
Full Time
$77k-90k (estimate)
04/05/2024
04/30/2024
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