10 Analog Layout Engineer - Senior Consultant Jobs in San Jose, CA
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Analog Layout Engineer - Senior Consultant
$147k-175k (estimate)
Full Time
5 Months Ago
Redolent is Hiring an Analog Layout Engineer - Senior Consultant Near San Jose, CA
Hello,
One of our direct client is urgently looking for Analog Engineer @ San Jose, CA
Role - Analog Layout Engineer
Location - San Jose, CA
Contracting Position (six months with possible extension)
Experience in - 16nm TSMC OR 14nm OR 22nm Intel
Qualifications
One of our direct client is urgently looking for Analog Engineer @ San Jose, CA
Role - Analog Layout Engineer
Location - San Jose, CA
Contracting Position (six months with possible extension)
Experience in - 16nm TSMC OR 14nm OR 22nm Intel
- The senior layout designer will be responsible for the layout of high-performance analog cores such as analog-to-digital converters, digital-to-analog converters, PLL, transceivers, etc.
- Responsibilities include leading IC layout of cutting-edge high performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 5nm, 7nm, 16nm, 28nm, 40nm and 65nm following best practices from the industry.
- This is an onsite role.
Qualifications
- Thorough knowledge of industry-standard EDA tools from Cadence, Mentor, and Synopsys.
- Must be able to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
- Experience with layout of high-performance analog blocks such as analog to digital converters, references, digital to analog converters, PLL etc. desired.
- Experience with floor planning, block-level routing, and top-level chip assembly.
- Knowledge of high-performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
- Demonstrated experience with the analog layout for silicon chips in mass production.
- Experience with FinFET process nodes preferred
- Experience working with distributed design teams is a plus.
- Knowledge of skill code layout automation is a plus.
- Self-starter with the ability to define and adhere to a schedule.
- Must possess strong written and verbal communication skills.
- 10 years experience in high-performance analog layout in advanced CMOS processes.
Job Summary
JOB TYPE
Full Time
SALARY
$147k-175k (estimate)
POST DATE
12/13/2023
EXPIRATION DATE
07/08/2024
WEBSITE
redolentech.com
HEADQUARTERS
San Jose, CA
SIZE
25 - 50
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