Machine Learning SoC Architect Responsibilities:

• Work on algorithm analysis, performance analysis and architecture definition of Machine Learning ASICs.
• Map Data Center workloads to heterogeneous ASICs that contain multiple different programmable processors and hardware accelerators. Perform detailed calculations to specify computation throughput, memory bandwidth and latency
• evaluate performance v/s area v/s power tradeoffs.
• Drive the architecture definition of one or more of the following ASIC sub-systems: compute, memory, Network-On-Chip (NoC), collectives, debug etc. and chiplet based multi-die SoCs.
• Identify appropriate workloads and micro-benchmarks to be used for performance analysis and drive this analysis on simulation and emulation platforms to define and validate the architecture.
• Evangelize your innovative architectural solutions with your peers and leadership, while mentoring members of the architecture team.
• Collaborate with cross functional teams working on RTL design, Design Verification, Firmware/Software development, Pre-Post silicon validation and Program Management to deliver first pass functional silicon on an aggressive schedule.
• Collaborate with software and firmware teams to ensure that the ASIC meets end to end application performance goals while maintaining ease and efficiency of software development.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• Experience and knowledge of Computer Architecture concepts such as microprocessor architecture, memory systems, on-chip interconnection networks, hardware/software partitioning etc.
• 20 years of prior experience in defining and delivering multiple high performance ASICs into production, with focus on architecture definition and performance analysis.

Preferred Qualifications:

• Master's or PhD degree in Electrical Engineering, Computer Engineering or related field.
• Domain knowledge in one or more of power/performance tradeoffs, digital signal processing, ML networks, ML frameworks such as Pytorch.
• Programming in C or C with knowledge of mapping hardware algorithms to efficient C/C code.

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