Job Details:
Job Description:
Designs, develops, and builds analog circuits in advanced process nodes for analog and mixedsignal IPs. Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models. Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results. Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals. Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues. Optimizes performance, power, area, and reduces leakage of circuits. Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.
This is an entry level position and compensation will be given accordingly.
#DesignEnablement
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.
Minimum Qualification:
Candidate must possess a MS degree with 6 months of experience or PhD degree with 1 years of experience in Electrical Engineering or related field.
6 months of experience in the following:
- Analog/Mixed-signal IC designs.
- Feature and specification definition of potential circuits such as Data Converter circuits or Switched Capacitor Circuits or Bandgap references, or op amps or bias circuits or Ring Oscillators or LDOs or Charge Pumps, etc.
- Exploration of novel, robust, competitive circuit solutions (considering power, area and performance) through feasibility studies.
- Circuit design convergence using industry standard design and validation tools.
- Device physics and process technology, especially as it applies to Analog/Mixed-signal designs.
Preferred Qualifications:
6 months of experience in the following:
- Scripting languages (perl, tcl, etc.) to enhance design automation, verification, and delivery.
- Post-Si debug from design perspective, including proposing tests and experiments, and reviewing results.
- Effective schematic capture and behavioral modeling of circuits in Verilog, as well as logical equivalence verification between schematic and Verilog models.
- Physical verification of circuit through layout-extracted static timing analysis (STA), electrical rules' check and noise analysis.
- Reliability verification of layout: IR drop, electro-migration and self-heat analysis.
- Layout strategies, and techniques (including analog techniques) to meet variance, timing, noise, and reliability requirements.
- Experience in transient circuit simulation, Monte Carlo simulation, stability/Pole-Zero analysis, circuit aging and electrical overstress analysis.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
Business group:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.