*** No visa sponsorships supported

JOB DESCRIPTION

Please Note:

• This is a Hybrid position and the candidate must work in person out of Richardson TX three days a week
• Will offer one time relocation bonus for a strong non local candidate who is willing to move to the area
• Flexible on salary depending on candidate's experience

If you wish to be a part of a team dedicated to delivering industry-leading performance through outstanding talent, and a culture of innovation and collaboration, then this is an opportunity you won't want to miss!Company is hiring a Senior Digital Design Engineer in Richardson TX. This is a hybrid opportunity that will allow the incumbent to participate in our Flex at Work programHow You'll Help Us Connect The World:
As a member of our hardware engineering team within the advance technology group, this role develops high speed digital signal processing circuit cards for 5G access point transceiver system consisting of 10/25/40 Gbps optical interface, front haul interface and signal processing in FPGA, DC power conversion circuitry, system clocking and synchronization circuits and high-speed data converters. You will conduct FPGA & CPLD device evaluation to determine the best application fit for cost, size and power consumption. You will make an impact by conducting digital and mixed signal circuit designs and schematic capture for all circuitries including QSFP, FPGA, CPLD, ASIC, high speed data converters, power conversion circuits and clocking circuits. Perform system architecture analysis, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis. You will be encouraged to lead PCB design ensuring high density FPGA break-out, high speed serial and bus matched length routing and signal integrity, line impedance control, mixed signal noise immunity, and low noise power distribution.Required Qualifications for Consideration:

• Bachelor of Science in Electrical Engineering or a similar degree plus minimum 10 years direct related experience
• Experience in high-speed digital design including FPGAs, CPLDs, optical SFPs, DDR4 memory, high speed data converters, power conversion circuits, system clocking and synchronization including PTP
• Experience using Mentor Graphics or other schematic capture tools
• Experience in directing PCB layout of high-speed signal routing, matched length routing and signal integrity simulation for 28 Gbps serial links and DDR3/4 memory interfaces
• Experience using high-speed serial communication interfaces including LVDS, USB, SPI, CPRI (preferred) and I2C

You Will Excite Us If You Have:

• Master's degree. Experience in design and routing of high-speed JESD buses and DDR interfaces. Experience in generation and distribution of low jitter system clock trees. Background in analyzing system architecture, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis. Experience in development of high-speed signal processing hardware for wireless infrastructure equipment. Experience implementing IEEE-1588 and SynchE client synchronization