Interfaces: PCIE, Ethernet, MIPI, DDR, USB, Embedded C, Python

Areas of Responsibility

• Lead the Silicon bringup process for new chip from initial poweron to Functional Validation and performance Optimization
• Develop Comprehensive validation plans and methodologies to ensure the functionality,performance and reliablity of Silicon.
• Oversee functional Validation activies for Silicon with focus on hardware debugging and Troubleshooting .
• Collaborate closely with the crossfunctional teams and IP Vendors to identify, analsye to resolve the complex silicon issues.
• Employ advanced debugging techniques and tools to investigate and resolve hardware-related issues using Instrumentation.
• Drive Continous improvment initiatives to enhance validation process.
• Stay Updated with the Industry Standards related to High speed IO interfaces and contribute to the develpoment .

• Strong Understanding of Digital and Analog Circutry, Architecture and Validation concepts.
• 5 Years of hands-on experience in silicon bringup.
• Experience with High speed IO protocols and standards such as PCIE,Ethernet,DDR,MIPI and USB
• Proven Expertise in developing and executing validation plans,test cases and methodlogies in Silicon .
• Must have knowledge of using Lab equipment s logic and spectrum analyzers and basic lab instruments like DMM, Scope.
• Proficient in scripting and programming Languages for testing and debugging the scripts.
• Excellent analaytical, probelm solving skills with the ability to effectively collabraote with the cross functional Teams.
• Strong Understanding of JTAG and experince with JTAG debugging tools for debugging hardware/software interactions and validating JTAG-based register access.