What are the responsibilities and job description for the Verification Engineer position at TPI Global Solutions?
- Note: Only W2 - No C2C
TPI Global Solutions is seeking an experienced and skilled Verification Engineer for a contract opportunity with our client, a leading multinational semiconductor company.
You will join a dynamic PCIe development and productization team, playing a crucial role in the design and functional verification of next-generation IP blocks. This is a hands-on technical role where you will be responsible for building and maintaining a sophisticated PCIe verification environment.
Key Responsibilities:
- Develop and enhance the UVM simulation test environment, creating both directed and constrained-random test cases.
- Participate in the complete verification lifecycle of complex IP blocks, with a primary focus on PCIe device testing (DMA, CXL, IDE).
- Create and maintain test benches, VIP models, and traffic generators/checkers.
- Work closely with the RTL design team to identify, debug, and resolve functional issues in the design.
- Adopt and apply evolving, industry-standard verification methodologies to ensure the highest quality results.
Essential Qualifications:
- 5-8 years of proven experience in RTL verification for IP or SoC development.
- Strong, hands-on experience with the PCI Express (PCIe) protocol.
- Proficiency in setting up and working within UVM (Universal Verification Methodology) environments.
- Expertise in Verilog and SystemVerilog.
- Demonstrated experience with simulation tools like ModelSim or VCS.
- Excellent analytical and debugging skills.
Preferred Qualifications:
- Experience with AMD/Xilinx FPGAs and Vivado tools.
- Familiarity with other high-speed serial protocols.
This is a full-time, 100% onsite contract role located in Longmont, CO. Candidates must be willing to work onsite.
