Sr. FPGA Design & Validation Engineer

I’m currently hiring for a Sr. FPGA Design & Validation Engineer role with a leading semiconductor company in Santa Clara, CA. This role focuses on FPGA prototyping, RTL design, and system-level validation, working closely with hardware, firmware, and system engineering teams.

Key Skills We’re Looking For:

• Strong experience with FPGA design using Verilog/SystemVerilog (RTL)

• Hands-on experience with Xilinx devices (UltraScale/UltraScale /Versal) and Vivado

• Experience with FPGA prototyping platforms (Xilinx boards, Synopsys HAPS, etc.)

• Familiarity with board bring-up and hardware debugging tools (logic analyzers, oscilloscopes)

• Experience with timing analysis, synthesis, and closure

• Knowledge of high-speed protocols (PCIe, USB) and scripting (Python/TCL) is a plus

Role Highlights:

• Design and implement complex FPGA architectures for high-performance systems

• Work on FPGA prototyping, bring-up, and validation

• Perform board-level debugging and system integration testing

• Collaborate with cross-functional teams to resolve hardware/firmware issues

• Drive timing closure, optimization, and performance validation

• Participate in design reviews and technical discussions

📍 Location: Santa Clara, CA (100% onsite)

📅 Duration: Long-term contract

If this aligns with your background, I’d be happy to share more details. You can reply here or call/text me at 415-463-1632

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