FPGA Design & Validation Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

We are seeking a skilled FPGA Design and FPGA-Based Prototyping Platform Validation and Bring-Up Engineer to join our cutting-edge engineering team. The ideal candidate will have experience with leading prototyping platforms such as Veloce, proFPGA CS, HAPS, Protium, proFPGA, and ZeBu. This role requires a proactive engineer with a background in FPGA-based design, prototyping, validation, and system bring-up.

THE PERSON:

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

• Lead the validation and bring-up of FPGA-based prototyping platforms, ensuring functionality and performance meet design specifications.
• Work with Emulation and Prototyping platforms to develop and validate complex system prototypes.
• Design, implement, and optimize FPGA IPs in Verilog/SystemVerilog (or VHDL) for datacenter-class systems.
• Bring up FPGAs on custom PCB platforms, executing validation and debugging at the board/system level.
• Use FPGA toolchains (Xilinx Vivado, EDA toolchains or similar) for synthesis, P&R, and debugging.
• Hands-on experience with prototyping platforms such as Veloce proFPGA CS, HAPS, Protium, proFPGA, and ZeBu.
• Strong understanding of FPGA architectures and digital design principles.
• Proficiency in hardware description languages (e.g., VHDL, System Verilog, Verilog) and simulation tools.
• Collaborate with design and verification teams to integrate and test FPGA prototypes within larger system architecture.
• Develop and execute automated test plans to validate system functionality, performance, and reliability. Debug and resolve issues related to FPGA prototypes, working closely with cross-functional teams to implement solutions.
• Document validation processes, test results, and provide feedback to design teams for continuous improvement.
• Provide technical guidance and support to junior engineers and team members.

PREFERRED EXPERIENCE:

• Collaborate with firmware and software engineers to integrate FPGA IPs into larger system workflows.
• Perform lab-based debug using oscilloscopes, logic analyzers, ILAs, JTAG, and protocol analyzers.
• Provide documentation and training to internal teams on IP functionality, debug, and integration.
• Support system bring-up, DVT, and factory qualification as part of full product lifecycle.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

LOCATION: San Jose, CA

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.