Senior FPGA Design Engineer

Senior FPGA Design Engineer responsible for developing and implementing advanced signal processing algorithms for wireless communication systems and MIMO networking products. This role focuses on FPGA architecture, RTL design, timing closure, and hardware verification in a high-performance wireless R&D environment.

Responsibilities

• Architect and develop digital FPGA designs for wireless communication systems
• Implement fixed-point signal processing algorithms in collaboration with systems engineering teams
• Perform RTL coding, simulation, and test bench development
• Execute FPGA synthesis, timing analysis, and timing closure activities
• Support hardware verification, debugging, and troubleshooting efforts using logic analyzers and related tools
• Collaborate cross-functionally with RF, Software, and Systems Engineering teams
• Support development and optimization of FPGA-based designs for advanced wireless R&D projects
• Participate throughout the product lifecycle from concept development through deployment
  
  

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Science, or related field
• 6 years of FPGA design experience (or equivalent advanced degree experience)
• Strong experience with fixed-point arithmetic and digital signal processing (DSP) design
• Expertise with high-utilization, multi-clock-domain FPGA designs
• Strong RTL development experience
• Experience with Xilinx FPGAs, SoCs, and Vivado IDE
• Experience with FPGA simulation, synthesis, and timing closure
• Strong hardware debugging and troubleshooting skills
• U.S. Person status required (U.S. Citizen or Permanent Resident)
  
  

Preferred

• Master’s degree in Electrical Engineering
• MATLAB experience
• Experience with communication systems, FPGA, or ASIC-based wireless designs
  
  

Pay Rate

• $140-190k