Tesla's Silicon Development Group is looking for a Design-for-Test (DFT) Design Verification Engineer to work on semi-custom ASICs. You will drive state of the art in the area of testability and contribute to product coverage and quality by verifying the DFT features pre-silicon and by delivering test content for post-silicon.

• Create Verilog/System Verilog test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and boundary scan at block and SoC-level
• Verify top-level features such as power-on self-test, clock observation, clock stop and scan dump
• Run DV regressions & analyze coverage, triage & debug failures
• Run gatesims
• Work with the RTL designers on identifying design fixes as needed
• Work with test engineers on delivering pre-Si DV testcases for silicon bring up
• Help/Participate in silicon bring up

• Knowledge of testability techniques and features (1149.1, 1149.6, 1687, 1500, Scan, Built-in-Self-Test, Loop-Back etc.) covering digital logic domain, embedded memories and PHY/IOs
• JTAG/1500/1687 networks and languages BSDL, ICL and PDL
• Experience in general design verification methodology, regressions, simulation and debug tools
• Expertise in Verilog or System-Verilog
• Working knowledge of scripting languages such as TCL, python (or another scripting language such as Perl)
• Degree in Computer Engineering or Electrical Engineering or equivalent experience with evidence of exceptional abilities in DFT verification

Tesla is an Equal Opportunity / Affirmative Action employer committed to diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state or local laws.

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