Job Title: ASIC Design Engineer

Degree Required: BS or higher, MS or higher preferred

Academic Discipline (s): Electrical or Electronics Engineering

Job Description:

As an ASIC Designer for the SSD ASIC Design Team, you will take part in developing leading edge SSD controller products and you will experience a different and exciting journey at TenaFe.

Job Duties/Responsibilities:

• RTL Coding, including block design, top level design, Lower power design, CPF/UPF design
• Verify design and debug in RTL-level, gate-level and PG gate level
• Simulations, design constraints, coding style checking, cross clock domain checking, synthesis and timing closures
• Bug analysis and fixing, formal check.
• Area, Power, FIT estimation/measure, DFT related, and ATE support
• Deliver design/verification/application documents/SPEC
• Work closely with the Algorithm Engineer to develop and debug new IP/products
• Work closely with the Verification/System/Firmware Engineer to verify/validate new IP/products

Required Qualifications:

• Knowledge of digital circuit, and IC/IP background, Proactive in developing and improving IP and flow
• Experience in Verilog code design and verification
• Experience in Unix/Linux OS, and scripting language like Perl
• Familiar with C, UVM
• Familiar with ASIC frontend flow and related tools (synthesis, formal, CDC, STA and DFT tools)
• Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form
• A high level of self-motivation, the ability to be a self-starter with a good attitude and be highly responsible
• Good written, verbal and presentation communication skills 
• Ability to work in a team environment
• MSEE or higher preferred

Knowledge and skill preferred, but not required:

• Demonstrate SSD controller design experience
• Complicated SOC design experience
• Knowledge of PCIe and NVMe
• Knowledge of DDR and NAND flash