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Job ID 17762SDL supports a variety of missions, including NASA’s vision to reveal the unknown for the benefit of humankind and the Department of Defense’s aim to protect our Nation on the ground, in the air, and in space. Our sensors, satellites, software systems, and science and engineering play an essential role in some important missions you’ve heard of, and others that you haven’t. Join our team in our seventh decade of delivering mission success.The Space Dynamics Laboratory (SDL) is in search of a junior FPGA design engineer to assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads. The selected candidate will be involved in all aspects of payload algorithm discernment, development, optimization, and testing. The selected candidate must be able to work as part of larger electronics teams, internal and external to the organization, and own all aspects of their assigned block of the design from concept to integration and test. This position is full time and is located in Logan, UT.SDL Benefits:At SDL, we take pride in and highly value our employees. SDL offers competitive salaries and fantastic benefits, including:
For questions or assistance with the application process or the DoD SkillBridge program, please contact employment@sdl.usu.edu.
EOE including Disability and Vet
Full Time
$78k-95k (estimate)
03/15/2024
04/24/2024
spacedynamics.org
Logan, UT
50 - 100