Digital design engineer developing complex mixed-signal ICs for frequency control, clock generation, network synchronization, and other timing applications. The candidate will take a supporting or leading role depending on experience relative to other team members, but regardless of experience level, candidate will be involved in all aspects of the design process from system conceptualization to mass production. For example, candidate will participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and full-chip mixed-signal verification. Responsibilities will also include detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required for the achievement of high volume production.

Responsibilities

• Digital design specification, design, analysis, and HDL (Verilog) coding
• Behavioral modeling of analog and mixed signal circuits
• Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc.
• Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RTL, firmware, and behavioral models. Test bench development
• Validation of silicon functionality, behavior, and performance

MS in Electrical Engineering
Strong motivation to contribute to all facets of chip design from conceptualization to release to production
Working knowledge of digital IC circuit design in an HDL synthesis environment
Working knowledge of digital verification and testing techniques
Good verbal and written communication skills, positive attitude, desire to learn, and willingness to work on a team
Working knowledge of UNIX operating systems
Additional skills (one or more of these are highly desirable)

Experience with digital design at geometries ranging from 130-40 nm
Experience with digital IO interfaces such at I2C, SPI, etc.
Competence in high-level languages (e.g. Matlab, C), scripting languages (e.g. Tcl, Perl, Python, SKILL), and version control systems (e.g. SVN, SOS)
Working knowledge of System Verilog and/or UVM
Experience leading a team of digital designers, either formally or informally
Experience with embedded processor design and firmware/software development, especially for 8051 or ARM cores
Competence in exploring digital and firmware system/architecture trade-offs such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP
Experience with memory generators and MBIST
Low power design and implementation techniques
Familiarity with DSP techniques and algorithms
Experience with Phase-locked-loops, Frequency Synthesizers or CDR circuits.

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