2 Design Verification Engineer Jobs in Menlo, CA
Redolent is Hiring a Design Verification Engineer Near Menlo, CA
One of our direct client is urgently looking for Design Verification Engineer @ Menlo Park, CA.
Role - Design Verification Engineer
Location - Menlo Park, CA
Minimum Qualifications
- BSEE/MSEE/BSCompE/MSCompE with 5 years of industry experience
- 3 years of UVM experience (so this implies 3 years of SystemVerilog as well)
- Deep understanding of coverage, constrained-random, transaction level
- Experience with Verdi/VCS is a must
- Experience with test plan documentation
- Familiarity with Python3/Bash/Tcl scripting is a must
- Experience with debugging simulation failures to guide digital design
- Experience with fixed-point arithmetic
- Preferred Qualifications
- BSEE/MSEE/BSCompE/MSCompE with 10 years of industry experience
- Experience with performance analysis and performance characterization a plus.
- Experience with using a Hierarchical Verification Plan is a plus.
- Experienced with a full ASIC/SOC tape out from beginning to end
- Experience with video processing or graphics pipelines is a plus
- Experience with floating-point arithmetic in addition to fixed-point arithmetic
Job Summary
Full Time
$119k-139k (estimate)
12/13/2023
06/15/2024
redolentech.com
San Jose, CA
25 - 50
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The following is the career advancement route for Design Verification Engineer positions, which can be used as a reference in future career path planning. As a Design Verification Engineer, it can be promoted into senior positions as a Product Design Engineer II that are expected to handle more key tasks, people in this role will get a higher salary paid than an ordinary Design Verification Engineer. You can explore the career advancement for a Design Verification Engineer below and select your interested title to get hiring information.
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