USA: San Jose, Dallas, Texas India: Bangalore/ Vadodara, Gujarat

Job Type: Full Time

Nebula Microsystems is a well-funded start-up and operations in multiple countries with a mission to deliver intelligent and high-performance Mixed-Signal Products for a wide variety of applications. Nebula is seeking to hire highly motivated Digital DV Leads.

Salient Advantages of NebMicro:

• Be part of early growth of the company
• Be in the center of the organization impacting and influencing multiple the product lines

Requirements (Multiple openings) : 

• Bachelors/Master’s degree in Electronics /Electrical Engineering 
•  5 years of hands-on Industry experience in Digital and/or Digital Mixed Signal verification with track record in first-pass functional silicon
• Excellent communication and problem solving skills
• Proficiency in advanced verification methodologies and flows. Fluency in System Verilog and UVM.
• Hands-on experience with developing advanced test benches, writing checkers and assertions, applying directed and constrained random techniques.
• Technical and team leadership – both within the internal project DV team, but also directly supporting customers in real-time.
• Primary focus is on (digital) design verification, but proficiency with mixed-signal design verification and creation/validation of behavioral models is a plus.
• Experience running RTL and Gate-level simulations at block and top-level with solid debugging skills.
• Generation of relevant documentation (DV Plan, DV execution plan, review collateral, etc.). Create comprehensive verification plans for Mixed-Signal designs.
• Working knowledge of Cadence vManager toolchain preferred.
• Proficiency in various types of coverage collection and analysis including code coverage, functional coverage, and assertion coverage.
• Regression debugs and failure analysis. Determine root-cause and collaborate with cross-functional groups to drive the closure of issues/bugs.
• Proficient in a scripting language such as Python, Perl, Bash, or similar.
• Great team player with ability to learn from and mentor others.
• Self-driven with desire to seek diverse challenges.
• Proficiency in System Verilog Assertion-based (SVA) verification plus.
• Experience in Formal verification techniques a plus.
• Experience with microprocessor integration a plus

Responsibilities

• This role will empower you to lead critical block or sub-system verification and full-chip verification of complex Analog mixed-signal products.
• Comprehend specifications and requirements with systems team. Extract relevant features.
• Develop a detailed requirements-based verification plan. Attributes should include stimulus, constraints, test cases, use cases, scoreboard checkers, assertions etc.
• Drive DV plan reviews with cross-functional teams, obtain sign-off. • Architect and develop test benches and regression environments.
• Implement and simulate attributes defined in the DV plan.
• Root-cause design and test bench bugs, collaborate with functional teams to facilitate bug fixes, verify and drive design-DV loop to closure.
• Execute, track and report status to project management on regular basis.
• Drive coverage metrics analysis and closure • Collaborate with or support digital and mixed-signal co-simulation using System Verilog analog behavioral models.

Compensation:
● Attractive and Industry leading compensation