Seeking a talented FPGA Design Engineer with deep experience in one or more of the key areas required to support the development of world-class SoCs to be deployed in these high performance computing environments.

Key Tasks include:

• Support the parallel development and validation of high-performance computing ASICs through the targeting of the ASIC’s IP/RTL to an FPGA-based acceleration platform.
• Replace ASIC-specific IP that cannot be targeted to an FPGA, with FPGA-specific IP for the same purpose, by developing integration (shim) wrappers that closely model the ASIC IP.
• Support the parallel verification of the ASIC RTL by supplementing the verification environments created for silicon validation.
• Provide support for firmware and software development on the FPGA platform by working with cross-functional teams to implement and debug the combined software and hardware solution.
• Perform scaled-performance testing and error-case analysis.
• Contribute ideas, solutions, bug-fixes, and possible architectural improvements to the designs being implemented.
• Create complex compute-intensive lab scenarios to closely model scaled-down customer deployment environments.
• Selection of project appropriate FPGA platform.
• Participate in design reviews and recommend improvements.

Requirements

• B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
• Experience in digital design with one or more HDL languages that must include either System Verilog or Verilog.
• Proficient in one or more scripting languages (TCL, Python, Perl)
• Deep understanding of FPGA development flows including digital design, IP integration, simulation and synthesis.
• 8 years of FPGA development experience.

Hybrid arrangement involving appr 20% time on site during the week.