Career Opportunity:
Job Title: DFT Sr. Staff Engineer

About CodeForce 360
Making a career choice is amongst the most critical choices one can make, and it's important for the choice to be calculated with factors such as a company's run of success since its inception and more. But, when you come across a company that has reputation proven with nothing but an illustrious run of success since the day it began, you don't need to think of anything else. That's precisely what some of our employees and prospective employees think when they came across CodeForce 360.

Position Overview

DFT Sr. Staff Engineer

Must-have skills for this role:

• Electrical Engineering
• Electronic Design Automation (EDA)
• Semiconductor Design & Development

Years of experience required for each skill? 3-7 years' experience

Nice-to-have skills:

• Developing DFT specifications
• Industry standard DFT and design tools
• Debugging ATPG/MBIST patterns

The Work:

• Work with the Silicon teams to document the DFT specifications and define the requirements
• Develop and implement DFT architecture and infrastructure
• Develop and drive execution of enhanced DFX (DFT/Design-For-Debug) methodologies, with increased focus on debug support
• Work with the DV team to verify DFT implementations
• Generate structural test vectors, analyze and improve coverage/test time/test cost
• Work with designers on STA, physical, power and logical issues impacting DFT
• Work with test engineers to bring up test vectors on silicon
• Work with lab bring-up teams to bring up test vectors in the lab environment
• Manage schedules and support internal and external cross-functional/cross-organizational engineering efforts

Here's what you need:

• A minimum of three years of experience with Hardware Design-For-Test (DFT) engineering including
• A minimum of three years of experience in uP and/or GPU and/or Video Processing
• Bachelor's Degree or equivalent (12 years) work experience (If an, Associate's Degree with 6 years of work experience)

Bonus points if:

• Developing DFT specifications
• Industry standard DFT and design tools
• Debugging ATPG/MBIST patterns
• STA constraints and their interaction with DFT
• Experience with Root Cause Analysis
• IP / Top Scan insertion (all EDA solutions)
• IP / Top Mbist insertion (all EDA solutions)
• Scripting languages TCL/Perl/Python
• Experience with Synopsys DFT tools (Tetramax, DFT compiler, BSD compiler, Formality, Spyglass)
• Experience with JTAG and IEEE standards 1149.1 and 1149.6.

Additional Job Details:

• API Security (P3 - Advanced)
• Hardware Troubleshooting (P3 - Advanced)