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Principal Analog Mixed Signal Design Engineer
Bey Irvine, CA
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$108k-129k (estimate)
Full Time 5 Days Ago
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Bey is Hiring a Principal Analog Mixed Signal Design Engineer Near Irvine, CA

Job Description

Job Description
Job Description

Principal Analog Mixed Signal Design Engineer – RF / SiPho / TIA / CMOS / SiGe

Hybrid - 2 days a week minimum in office

Locations: Westlake Village, CA; Ottawa, Canada; Santa Clara, CA and Irvine, CA

Irvine, CA, US

Santa Clara, CA, US

Westlake Village, CA, US

Seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz Transimpedance amplifiers TIAs. These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems. 

What We're Looking For

Bachelor’s degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 10 - 15 years’ experience Or MSc EE Or PhD EE with 5 years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design .

  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry). 
  • Solid experience in.
    • Using EDA CAD tools
    • Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamentals, including:
    • Detailed transistor level design
    • Device physics
    • Control/Feedback loop stability analysis
  • Direct project experience in at least one of the following areas is a plus:
    • AGC loop design
    • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
    • Experience in CTLE design
  • Experience in Package-System integration issues desired
  • Project experience in using different technologies. (SiGe BiCMOS is a plus)
  • A team-player
  • Experience in the following is a strong plus:
    • Overseeing and mentoring junior circuit designers
    • Experience as chip lead with success in silicon 
    • Experience in taking chips to mass production 
    • Ability to translate chip level specifications into architecture
  • Strong communication, presentation and documentation skills.
Additional Information

All your information will be kept confidential according to EEO guidelines.

Job Summary

JOB TYPE

Full Time

SALARY

$108k-129k (estimate)

POST DATE

04/23/2024

EXPIRATION DATE

05/11/2024

WEBSITE

beycorporations.com

SIZE

<25

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