The Role
Ampere Computing is looking for a DDR Validation Technical Leader for our best-in-class server solutions. The role is expected to cover all memory sub-system level pre/pos-silicon validation of our server products. Our product based on custom ARM 64-bit processors are designed for best-in-class performance, RAS & Security, Power & thermal consumption, and the applications targeting Cloud, Enterprise, and Data Centers.

We are looking for a highly skilled, self-motivated individual to drive DDR Controller, PHY, IO & system level silicon validation strategy to achieve end-to-end coverage and high-quality products. At this position you will be responsible for planning, developing, executing the server memory validation program which may include pre-silicon, driver development, bring-up, functional validation, characterization, etc. You will be involved in investigating and root causing & solving the issues related to design, platform hardware, software, or customer platform customizations.

Ampere Silicon Validation team is not just about testing, but it includes contributing in creating next generation products, involved in development, harnessing new ideas, challenging conventions, and providing creative solutions. Attention to details, Fault detection mindset, thinking out of the box, quality first, decision backed by data, preferring hands-on experience are some of the important characteristics expected in this role.

What you'll be doing

• Lead & manage a focused & motivated team to drive Ampere memory sub-system validation.
• Responsible to do pre/post-silicon bring-up and validate DDR5 controller features including standard & advanced RAS support, Performance, Low Power, QoS, JEDEC Protocol conformance, PHY/DRAM initialization sequencing, etc features.
• Responsible to architect & develop software routines for DDR PHY/DRAM initialization / training routines, equalization & IO tuning, SI/PI related optimization to achieve best signal integrity across all POR configurations/speeds & target platforms.
• Guide the team to write & debug DDR functional/margin test, FW level bare metal environment, BIOS initialization sequence, OS level applications and benchmarks to improve validation coverage.
• Contribute towards SI/PI related debug & testing, IO tuning, compliance testing and PVT characterization across all industry standard DRAM types/modules.
• Drive data collection for margin/failure analysis, SIPI co-relation, PVT testing to support all required DRAM types across.
• Involve in creating / reviewing / executing test plan in post silicon environments, perform debugging and failure analysis alongside the Silicon and Board design engineers to identify and fix any hardware bugs before going into production and support customer/vendor issues.
• Work with Architecture, Design & Firmware teams to plan for improving future product feature requirements, validation needs & quality standards.
• Setup & maintain DDR5 pre/post-silicon validation environment, boards, test equipment.
• Responsible for hiring and training junior engineers in post-silicon bring-up, testing and debugging of server-class ARM-based SOC design

What we need to see

• Minimum of 12 years of experience in DDR pre/post silicon validation.
• Minimum of 8 years of experience in system level validation for server platforms
• Expert level understanding of DDR4/5 controller and PHY features, JEDEC and DFI specifications.
• Expert in server memory sub-system requirements, DDR4/5 focused RCD/DB, DRAM features & technology trends.
• Rich experience in working on DDR 4/5 training, tuning, signal integrity optimization, equalization features validation and related optimizations.
• Deep understanding of Server boot up flow and specifically DDR initialization & test process.
• Comfortable with the lab environment, using DMM, high speed oscilloscopes, compliance, and similar tools.
• Knowledge of High-speed analog and VLSI design, board/package level transmission-line theory.
• Expert level digital/analog design/debug skills at both SoC and system level requirements.
• Experience with pre-silicon environments such as Verification, Emulation and Virtual Bring-Up, etc.
• Microcontroller & Embedded Systems Programming Experience in C/C
• Strengths in script languages such as Perl or Python, Linux shell script
• Exposure to ARMv8 server architecture, ATF/UEFI BIOS boot flow & OS level applications is a plus.
• Must be a self-starting team player with excellent interpersonal & communication skills and has been managing multi-site engineering team

Education
Bachelor's degree with 15 years’ experience or Master’s degree with 13 years’ experience in Electrical Engineering, Information Systems, Computer Science, or related field.
Perks in Santa Clara

• Office has panoramic views of Silicon Valley
• Garage parking, including charging stations and bike parking
• Gym and café on campus
• Healthy snacks, espresso, and drinks
• Standing desks
• Game room, including ping-pong
• Unlimited Flextime and 12 paid holidays

Pay and Benefits

Ampere offers a competitive total rewards package that includes base pay, bonus, stock, and comprehensive benefits. The full base pay range for this role is between $191,000 and $318,000. We also offer an annual bonus program tied to internal company goals and annual meritocratic stock awards that enable our employees to participate in the success of the company. Our benefits include health, wellness, and financial programs that support employees through every stage of life, with full benefits eligibility at 20 hours per week. Beyond compensation and benefits, our passionate teams thrive in an inclusive culture that empowers our employees to do more and grow more - all in service of inventing industry leading cloud-native designs that contribute to a more sustainable future. We look forward to sharing more about our career opportunities through interviews but reach out to talent@amperecomputing.com if you have questions that can’t wait.

Our Company

Ampere is designing the future of hyperscale cloud and edge computing with the world’s first cloud native processor. Built for the cloud with a modern 64-bit Arm server-based architecture, Ampere gives customers the freedom to accelerate the delivery of all cloud computing applications. With industry-leading cloud performance, power efficiency and scalability, Ampere processors are tailored for the continued growth of cloud and edge computing.

Our Story
Like the scientist behind its name, Ampere employees are innovators. We understand the needs of cloud computing and different software requirements. We are inventing what comes next and looking at everything from the structure of memory and how efficient the system is, to considerations on speed, cost of electricity and ability to cool. Power, size, weight, and cost are driving the technology requirements and the innovation to come.

Our world class team of engineers, with depth and expertise in the cloud and semiconductor industries, is not only focused on the development of new semiconductor designs but also building out the first software ecosystem for Arm®-based server processors.

Through the Ampere approach to the cloud and edge, we give our customers the freedom to challenge the status quo and accelerate next-generation data centers for the most memory-intensive applications. Given the challenge we have outlined, we are building a culture of entrepreneurs that ensure customers come first, proactively approaching industry challenges in the areas of security, power and performance, delivering results that matter most.

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