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Summary
Join an ambitious, experienced team of silicon and distributed systems experts as a Design For Test engineer. You have the opportunity to build a groundbreaking new category of product that revolutionizes the performance and scalability of next-generation distributed computing systems, and to help solve key infrastructure challenges facing our customers.
We are looking for talented, motivated candidates with experience building and deploying DFT flows for large-scale networking and computing chips, and who are looking to grow in a fast paced, dynamic startup environment.
Default location is Mountain View, CA, but we are equally open to remote candidates.
Roles & Responsibilities
Key Qualifications
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UUgICL3WZX
Full Time
$117k-138k (estimate)
05/06/2024
05/19/2024