What are the responsibilities and job description for the ASIC RTL Design Engineer position at TPI Global Solutions?
- Only W2 - No C2C
We are seeking a highly experienced Senior ASIC RTL Design Engineer to join our team working on cutting-edge technology. This is an on-site contract role based in San Jose, CA.
Key Responsibilities:
- Contribute to the end-to-end design of complex SoCs (System on a Chip) in advanced semiconductor processes.
- Develop micro-architectural specifications and convert them into efficient RTL code.
- Integrate a wide range of IP blocks, including ARM cores, PCIe, Ethernet, and DDR.
- Lead and participate in front-end design tasks including synthesis, timing closure, and quality checks (Lint, CDC, RDC).
- Collaborate closely with verification, physical design, and software teams to ensure successful silicon bring-up.
Ideal Candidate Profile:
- Proven experience in ASIC/SoC design and RTL development.
- Hands-on expertise with the ASIC design flow and front-end tools for Synthesis, Lint, and CDC analysis.
- Strong scripting skills in TCL and Python for automation.
- Working knowledge of industry-standard interfaces (ARM, PCIe, DDR).
- Excellent communication skills and the ability to work effectively in a team environment.
