What are the responsibilities and job description for the Packaging Engineer position at Technical-Link N. America?
We are seeking a talented High-speed IC package layout design engineer to contribute to the development of advanced microelectronic packages for semiconductors supporting up to 224 Gb/s data rates. The engineer will be responsible for package layout including all signal and power integrity routing while considering manufacturing and assembly tolerances. The engineer will also interface with package suppliers to contribute towards the selection of IC package technology, ensure manufacturability, and compliance with design rules for assembly
Requirements
Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience.
Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
Job Responsibilities
- Experience with 2.5D package design and development like CoWoS
- Strong expertise in using IC package layout tools like Cadence APD
- Understanding IC package design requirements for high speed interfaces and setup constraints manager
- Interface with the IC physical design teams for optimizing the die floor plan
- Experience in interfacing with Substrate suppliers and OSATs
- Ability to do automation of the layout tasks using scripting
- Power plane design and translating power supply requirements into design
- Familiarity with IC packaging technologies, materials, substrate design rules and assembly rules
- Track record of new product introduction from concept through development and production is a plus
- Knowledge of the thermal and mechanical analysis of the IC package development is a plus
- A team player with strong communication, presentation, and documentation skills
Salary : $80 - $90