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Memory Subsystem Engineer

Technical-Link N. America
Santa Clara, CA Full Time
POSTED ON 4/23/2026
AVAILABLE BEFORE 7/19/2026

Required Qualifications

  • 10 years of experience in memory subsystem, SoC, or IP development.
  • Expertise in DDR4/DDR5, LPDDR5/5X, and/or HBM architectures and system integration.
  • Background in architecture, RTL, verification, and silicon bring‑up.
  • Proven track record owning complex subsystems end‑to‑end across multiple products.
  • Experience working directly with customers and external partners.
  • Strong technical leadership and decision‑making skills in multi‑site environments.

Additional Qualifications

  • Experience defining reusable subsystem platforms or Centers of Excellence.
  • Familiarity with CHI/AXI‑based SoC fabrics and cross‑subsystem interactions.
  • Prior role as Chief Engineer, Fellow, or equivalent technical authority.

Salary.com Estimation for Memory Subsystem Engineer in Santa Clara, CA
$200,854 to $240,115
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