Semiconductor ATE Test Engineer (34381)

Local Candidates Only — Must currently reside in the Sunnyvale, CA area. Hybrid role requiring 3 days per week onsite.

Role Overview

Support R&D and production testing operations for an ASIC-focused semiconductor environment. This role bridges vendor coordination, wafer-level ATE platform support, production logistics, and process documentation — with a strong emphasis on yield improvement, compliance to TL/ISO manufacturing standards, and supporting engineering releases through pilot and production runs.

Key Responsibilities

Vendor Interface

Interface with external vendors for both R&D and production testing engagements, including invoice tracking and ongoing relationship management.

Test Plan Correlation

Ensure and correlate test software and hardware to written test plans; validate that all testing assets align with documented specifications.

Yield & Milestone Tracking

Track production yield and project milestones; perform problem assessment and disposition. Conduct failure Pareto analysis and drive yield improvement initiatives.

Wafer-Level ATE Support

Provide ATE platform support for production operations, including yield analysis and failure Pareto reporting to identify and resolve systematic production issues.

Production Logistics

Manage ASIC wafer tracking and travelers; oversee production logistics to ensure smooth flow through pilot runs and full production cycles.

Methods & Procedures

Develop, debug, and release production methods and procedures to improve efficiency and yield in compliance with TL/ISO manufacturing standards.

Key Skills & Competencies

Wafer-Level ATE ASIC Testing Yield Analysis Failure Pareto Analysis Production Logistics Test Plan Development HW / SW Correlation Vendor Management Milestone Tracking TL / ISO Standards Pilot & Production Runs Process Documentation Problem Disposition Invoice Tracking Engineering Releases