What are the responsibilities and job description for the Analog and RF Layout Engineer position at Quantum Integrators?
Position - Analog and RF Layout Engineer
Location - Sunnyvale, CA
Duration - 6 Months
Job Description
• Minimum 6 years of experience in Analog and RF layout.
• Experience developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.
• Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
• Experience with layout of high-performance high-speed analog mixed-signal blocks such Transceivers, CMOS drivers, high-speed Data converters and PLLs.
• Experience with floor planning, block level routing and top-level chip assemble.
• Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electro-migration.
Key Responsibilities:
developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level
Mandatory skills and skill proficiencies required:
- advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.
- Experience with floor planning, block level routing and top-level chip assemble.
- Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
Optional skills and skill proficiencies:
- Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electro-migration.