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Principal Electronics Engineer

MKS Inc.
Irvine, CA Full Time
POSTED ON 5/1/2026
AVAILABLE BEFORE 5/30/2026
A Day in Your Life at MKS:

As a Principal Electronics Engineer at MKS, you will partner with global customers, cross‑functional engineering teams, and internal technical stakeholders to architect, design, and support advanced electronics and FPGA‑based solutions. In this role, you will be overseeing high‑performance digital hardware, system integration, and customer‑facing technical engagements.

Your day will involve driving complex digital system architecture, leading FPGA development activities, translating system‑level specifications into detailed hardware and firmware requirements, and supporting system‑level troubleshooting and validation. You will regularly collaborate with international customers, participate in technical discussions, contribute to design reviews, and support global engagements, including occasional travel to customer sites.

You Will Make an Impact By:

  • Architecting and delivering complex digital systems integrating processors, SoCs, memory subsystems, and high‑speed digital interfaces.
  • Leading FPGA development (Zynq, Intel Cyclone), including RTL design, timing closure, constraints creation, and integration with embedded teams.
  • Translating high‑level system specifications into clear, detailed engineering requirements that guide board‑level hardware design, FPGA architecture, interface definitions, and subsystem behaviors.
  • Creating analytical, model‑driven evaluations of digital circuits and systems — timing budgets, signal/power integrity behavior, power modeling, and performance analysis.
  • Driving board-level digital hardware development including schematics, component selection, and hands‑on PCB layout (including controlled impedance routing, differential pairs, stack-up definition, power distribution and grounding strategy).
  • Ensuring designs follow DfX (Manufacturing, Testing, Reliability, Compliance) best practices.
  • Leading PCBA bring-up, digital debug, system-level validation, and structured root-cause investigations (8D/5‑Why).
  • Producing high-quality engineering documentation including architecture descriptions, interface specifications, and customer-facing presentations.
  • Presenting detailed design rationale, modeling results, and quantitative trade studies to international customers and internal engineering stakeholders.
  • Working collaboratively in a multi‑disciplinary engineering environment, demonstrating a strong commitment to shared problem‑solving, open cross‑functional communication, and a willingness to contribute beyond defined role boundaries.
  • Collaborating with international customers and partners, facilitating technical brainstorming sessions, and supporting global engagements with occasional overseas travel.

Skills You Bring:

  • 8 years of experience in high‑performance digital hardware design, FPGA development, and complex system integration.
  • Strong FPGA expertise: RTL architecture, synthesis, Static Timing Analysis (STA), timing closure, and SoC/processor‑to‑FPGA integration.
  • Ability to perform hands‑on PCB layout, including:
    • High-speed routing
    • Differential pair layout
    • Controlled impedance routing
    • Power distribution and grounding strategy
    • Layer stack up selection and constraints
  • Deep analytical and modeling skills for:
    • Digital timing analysis
    • Power/thermal estimation
    • Signal/power integrity modeling
    • Behavioral/electrical modeling (SPICE, MATLAB, Simulink, IBIS, etc.)
  • Strong system-level understanding of high-speed digital interfaces (DDR/LPDDR, PCIe, Ethernet, USB, LVDS, gigabit links).
  • Excellent technical documentation, design reporting, and engineering writing skills.
  • Outstanding presentation and communication skills, comfortable speaking with international customers.
  • Experience leading structured problem solving (8D, 5‑Why) and providing clear, data-supported conclusions.
  • Proficiency with lab debug tools (oscilloscopes, logic analyzers, protocol analyzers, boundary-scan/JTAG).
  • Bachelor’s degree in EE/CE (Master’s or PhD preferred).

Preferred Skills: (Optional)

  • Expertise with heterogeneous SoCs where ARM processing cores, DSP units, and FPGA logic coexist and interact through high-speed internal buses
  • Expertise using EDA/PCB and FPGA tools such as Altium Designer, Vivado/Vitis, and Quartus.
  • Familiarity with advanced Signal/Power Integrity and high-speed analysis tools (HyperLynx, SIwave, ADS).
  • Experience writing system architecture documents and customer-facing technical collateral.
  • Experience working with overseas CMs and global customers.
  • Leadership in establishing best practices for digital design flows, FPGA development processes, documentation standards, and validation workflows.

Compensation and Benefits:

Salary Pay Range: $126,200.00 - $210,350.00 USD per year. This range is a good faith estimate of the expected salary range for this position, based on a wide range of factors including qualifications, experience and training, operational and business needs and other considerations permitted by law.

Bonus: This position is eligible for a discretionary annual bonus, in an amount to be determined by MKS.

Benefits: MKS offers a comprehensive benefits package, including health insurance coverage (medical, dental and vision), 401(k) with company match, life and disability insurance, 12 paid holidays, sick time, 15 paid vacation days, [6 weeks fully paid] parental leave, adoption assistance and tuition reimbursement.

Salary : $126,200 - $210,350

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