What are the responsibilities and job description for the Verification Validation Engineer position at Insight Global?
JOB DESCRIPTION
We are seeking a highly skilled Mixed-Signal Verification Engineer to join our team, responsible for developing Digital-Mixed Signal (DMS) models of complex analog IPs. You will bridge the gap between analog design and digital verification, ensuring seamless integration and functional correctness of mixed-signal designs across multiple product lines. Typical
Day-to-Day
• Collaborate with Analog Designers: Interface directly with the analog design team to understand circuit architecture, behavior, and specifications for upcoming IPs.
• Model Development: Translate analog design intent into high-quality SystemVerilog DMS models that accurately describe analog behavior.
• Simulation & Validation: Run simulations to verify that the developed model matches the analog schematic, iterating as needed to ensure functional equivalence.
• Digital Verification Support: As the project progresses, support the chip DV (Digital Verification) team by ensuring models integrate correctly and the digital analog system works end-to-end.
• Tool-Driven Workflow: Use industry-standard EDA tools (Cadence/Synopsys flows) alongside emerging AI-assisted development tools to generate and validate models from design specs.
REQUIRED SKILLS AND EXPERIENCE
• 8 years of experience in mixed-signal verification, modeling, or related fields
• Strong proficiency in SystemVerilog, including experience with UDT/UDR nettypes (Cadence wreal or EEnet package) for analog modeling
• Deep understanding of analog circuit blocks, such as:
○ LDOs
○ Transimpedance Amplifiers (TIAs)
○ Analog muxing
○ SAR ADC sample-and-hold (S/H)
○ Comparators
○ DAC voltage converters
○ Buffering and amplification stages
• Experience modeling analog behavior in SystemVerilog – not just digital RTL, but capturing continuous-time/real-value analog behavior
• Hands-on experience running SV vs. schematic verification for leaf-level mixed-signal models
• Proficiency with Cadence simulation and linting tools (xrun, ncsim, vcs) and analog schematic editors
• Scripting skills in TCL, Perl, or Python for automation and workflow optimization
• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
Salary : $100,000 - $150,000