Verification Engineer

Verification Engineer

Position Overview
We are seeking a Verification Engineer to develop and execute verification strategies for complex digital designs and SoC blocks. The role focuses on building robust SystemVerilog/UVM testbenches, creating directed and constrained-random tests, automating verification flows with scripting, and collaborating with RTL designers and integration teams to ensure silicon quality and performance for protocols such as PCIe, CXL, NVMe, and SATA.

Key Responsibilities

• Design, implement, and maintain verification environments and testbenches using SystemVerilog and UVM to validate RTL and SoC blocks.
• Develop verification plans, create directed and constrained-random tests, and define coverage goals to drive sign-off criteria.
• Create and integrate protocol VIPs and checkers for PCIe, CXL, NVMe, SATA and other interfaces; validate protocol compliance and interoperability.
• Debug functional failures using simulators, waveform analysis, assertions, and root-cause analysis; work with RTL engineers to resolve issues.
• Automate regression and verification flows using Python, Perl, and build/test frameworks; manage job submission, results collection, and metric reporting.
• Collaborate with architects, RTL designers, firmware and software teams for system-level verification and bring-up activities, including FPGA/emu validation where applicable.
• Develop test harnesses and C/C /SystemC models as needed to accelerate verification and support co-verification with software.
• Collect and analyze functional coverage and code coverage data, produce clear verification status reports, and recommend closure plans.
• Contribute to verification methodology and infrastructure improvements, mentor junior engineers, and participate in design reviews.

Qualifications

• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 3 years of industry experience in digital verification; experience may vary based on seniority level.
• Strong proficiency in SystemVerilog and UVM for testbench development and constrained-random verification.
• Hands-on experience with Verilog/RTL design and debug practices.
• Proven experience with industry protocols: PCIe, CXL, NVMe, and/or SATA (protocol-level verification preferred).
• Solid scripting skills in Python and Perl for automation, plus familiarity with shell scripting and build systems.
• Proficiency in C or C for verification models, test drivers, or co-simulation tasks.
• Experience working on SoC verification, integration testing, and bringing up blocks in system contexts.
• Familiarity with simulation tools, emulation, hardware bring-up, assertions (SVA/PSL), and coverage-driven methodologies.
• Excellent problem-solving skills, strong written and verbal communication, and the ability to work effectively in cross-functional teams.

Benefits

• Medical
• Dental
• Vision
• PTO
• VIsion
• 401k
• Equity Potential 

Email Your Resume In Word To
Katherine.Tempel@cybercoders.com
Looking forward to receiving your resume through our website and going over the position with you. Clicking apply is the best way to apply.
Please do NOT change the email subject line in any way. You must keep the JobID: linkedin : KT4-1985912 -- in the email subject line for your application to be considered.
Katherine Tempel - Recruiting Manager

For this position, you must be currently authorized to work in the United States without the need for sponsorship for a non-immigrant visa. This is a new role.

CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.

This job was first posted by CyberCoders on 05/04/2026 and applications will be accepted on an ongoing basis until the position is filled or closed.

Everforth CyberCoders is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. Our hiring process includes AI screening for keywords and minimum qualifications. Recruiters review all results.  Everforth CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. Everforth CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at Benefits@CyberCoders.com to make arrangements.

Copyright © 2026 Everforth, Inc. All rights reserved.