What are the responsibilities and job description for the Principal Timing Engineer (STA/Physical Design) position at Chiparama?
- Perform full-chip Static Timing Analysis (STA).
- Develop, validate, and own SDC constraints based on architectural and micro-architecture specifications.
- Define and manage primary/generated clocks, IO delays, case analysis, false paths, multicycle paths, and other timing exceptions.
- Lead full-chip setup and hold ECO timing closure across all P&R stages.
- Perform and drive timing ECOs.