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Principal Design Verification Engineer (Silicon Engineering)

Chiparama
Sunnyvale, CA Contractor
POSTED ON 4/16/2026
AVAILABLE BEFORE 7/6/2026

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the client’s network.


RESPONSIBILITIES:

  • Responsible for digital ASIC and/or FPGA verification at block and system level
  • Lead and execute verification test plan, development, and milestones from beginning to end
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs


BASIC QUALIFICATIONS:

  • Bachelor’s degree in electrical engineering, computer engineering, or computer science
  • 10 years of experience with design verification and test bench development
  • 10 years of experience with design verification and test bench development


PREFERRED SKILLS AND EXPERIENCE:

  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM/OVM/VMM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements

Hourly Wage Estimation for Principal Design Verification Engineer (Silicon Engineering) in Sunnyvale, CA
$100.00 to $116.00
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