What are the responsibilities and job description for the IP Design Verification Engineer position at Canvendor?
Title : IP Design Verification Engineer
Location : Austin, TX / San Jose, CA
Minimum requirements:
• Phd/MS/BS in Electrical or Computer Engineering
• 12 years industry experience in a design verification role
• Expert hands-on coding skills in Testbench, Stimulus, checkers development, coverage closure.
• Experience with System Verilog, UVM or equivalent
• Knowledge of ARM protocols or equivalent protocols – CHI, AXI, ACElite, APB
• Experience with Git version control, Unix/Perl/Python scripting
• Good written and verbal communication skills
• Experience with GLS, power vector generation
• Formal verification skills will be a plus
• Combined experience with coherent interconnect, caches and LPDDR memory controllers will be a plus
