What are the responsibilities and job description for the Layout Engineer position at 24 Seven Talent?
Title: Mask Layout Designer (Contract – 2 Openings)
Location: San Diego or Cupertino, CA (Hybrid – onsite at either Mary 14 or UTC14)
Start Date: December 15, 2025
End Date: June 12, 2026
Hours: 40 per week
Pay Rate: $78.35/hr
Notes: Local candidates only (San Diego or Bay Area).
Overview
We’re looking for two experienced Mask Layout Designers to join a cutting-edge engineering team focused on developing next-generation RF, analog, and mixed-signal technologies. This role will play a key part in bringing advanced wireless systems to life — from concept through to high-volume production.
You’ll collaborate closely with design and verification engineers to layout and validate custom RF and analog IP blocks for complex SoC products used in high-performance, high-volume applications.
Key Responsibilities
- Perform detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLLs, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO circuits.
- Execute full verification flow including extraction, DRC, LVS, and DFM checks.
- Collaborate with circuit designers on block-level floor planning and optimization.
- Review and validate power/ground routing, electromigration, signal integrity, and matching for differential and IQ paths.
- Apply advanced layout techniques to ensure performance, reliability, and manufacturability across deep sub-micron CMOS nodes.
Minimum Qualifications
- Bachelor’s degree in Electrical Engineering or related field.
- 7 years of relevant industry experience in IC layout design.
- Hands-on experience with FinFET technologies.
Salary : $78