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Synapse Design Inc. is Hiring a Design Verification Engineer Near San Jose, CA
Synapse Design is looking forward to hire Design Verification Engineer expert.
Experience:: 10 years
Requirements:
- Solid programming skills in C/C , Verilog, System Verilog, UVM, assembly, Perl/Python.
- Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling.
- Experience in triaging regressions, debugging, and resolving down to RTL or Testbench issues.
- Experience building UVM scoreboards for NOC based Switching, Routing networks .
- Understanding of DFT/X and Post Silicon ATE correlation.
Preferred Skills
- Ability to create and connect C/C reference models via DPI for RTL-to-C checking.
- Experience with Formal Verification using tools like: Cadence JasperGold, Synopsys VCF or similar.
- Good understanding of number formats Floating-point arithmetic(FP8,FP16 FP32) and implementation.
- Knowledgeable in RISCV/ARM assembly programming
- Gate-level simulation experience
- Knowledge of UPF based simulations.
If interested, please share your resume at shashank.verma@quest-global.com and let me know your best time to reach.
Job Summary
Full Time
$73k-87k (estimate)
04/23/2024
05/08/2024
The following is the career advancement route for Design Verification Engineer positions, which can be used as a reference in future career path planning. As a Design Verification Engineer, it can be promoted into senior positions as a Product Design Engineer II that are expected to handle more key tasks, people in this role will get a higher salary paid than an ordinary Design Verification Engineer. You can explore the career advancement for a Design Verification Engineer below and select your interested title to get hiring information.
