What are the responsibilities and job description for the Mixed Signal Design Engineer position at VeriFast Technologies?
Title: Design Engineer
Type: Contract
Location: San Jose or Folsom (onsite only)
Rate: $50 - $100 per hour depending on experience.
As a Design Engineer, you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – from technology development and advanced memory designs to product development, systems design, and validation - resulting in world-class memory solution
s.In this position, you will collaborate with global build and verification teams. You will support groups like Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing. Together, you will develop products that optimize manufacturing functions and ensure cost, quality, reliability, time-to-market, and customer happines
Responsibilities
- Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits
- Parasitic modeling and assisting in design validation, reticle experiments, and required tape-out revisions
- Overseeing and managing the layout process, including floor-planning, placement, and routing
- Performing verification processes with modeling and simulation using industry-standard simulators
Preferred Qualifications
- MSEE 3 years’ post-graduate mix-signal or analog IC design experience
- 5-10 years of exposure to circuit debugging in collaboration with other engineering teams
- Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction
- Contributing to cross-group communication to work towards standardization and group success
- Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of products
- Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design qualities
- Driving innovation into the future: Memory generations within a dynamic work environment
Salary : $50 - $100