Silicon Design Validation Intern (AI2483)

Description

Job Title: Silicon Design Validation Intern

Job Location: San Jose, CA

Job ID: AI2483

Internship Term: preferably starting in May 2026 through August 2026.

Internship Stipend: The hourly pay rate range for this position is $44 - $46

ONSITE: This role requires the Intern to work from our San Jose, California office during the duration of the Internship.

Key Responsibilities

Roles and Responsibilities:

• Critical SoC power supplies - Establishing minimum and Maximum operating voltage range for SoC corner parts over min and Max temperatures.
• Power and Latency data collection for various MLA models
• LPDDR5 Voltage margining
• Lab Silicon data collection of:
• Perform needed Scope, Chiller and data collection set-up automation as needed.
• Any relevant lab debug, data set analysis and data collection as needed.
• Individual Contributor job function.
  
  

Requirements (Experience And Expertise Areas)

Must Have:

• Candidates are expected to have recently graduated, or nearing graduation, with an M.S. in EE or a related field.
• Very good knowledge of VLSI and Trasistors, Device Physics etc.
• Good lab debug and problem solving skill based on data set analysis.
• Optional: Knowledge of Paython and How to use lab equipment (Scope, Multi meter, Thermal head and thermal chamber etc.)
• Strong understanding of machine learning algorithms such as matrix multiplication and convolution.
• Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
  
  

EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.