FPGA Hardware Engineer

Job Title: FPGA Hardware Engineer

Duration: 3 years

Location: Lexington, MA – (onsite 3 days per week other remote)

Description: The Digital Hardware Engineer will design, implement, and validate advanced digital systems with an emphasis on FPGA-based development. The engineer will translate functional or algorithmic specifications into optimized HDL architectures, perform simulation and verification, and integrate these designs into prototypes and full hardware systems. This role requires expertise in complex, high‑speed digital design and hands-on experience bringing FPGA implementations into working hardware.

In addition to digital design, the engineer will develop and test supporting hardware such as power distribution, digital control, and other PCBs. Responsibilities include building and refining prototypes, diagnosing, and resolving defects, overseeing hardware integration, and maintaining detailed design documentation. The ideal candidate has strong FPGA/HDL skills, experience with hardware design tools, and the ability to evaluate, iterate, and improve both digital and physical system performance.

Background/Need:

• The Group provides support to the Department of Defense (DoD) in the design and development of various testbed systems and components aimed at facilitating data collection for ballistic missile defense tests.
• Key activities within the group encompass system concept development for RF and optical systems, modeling and simulation, the design of signal processing algorithms, the design and development of RF and optical systems, experimental field-testing, data analysis, and the creation of unique operational and experimental test assets.
• The group possesses expertise in adaptive sensor array processing applicable to both radar and communications, advanced real-time software methodologies, signal detection and estimation, communications, and systems analysis.
• A Digital Hardware Engineer is needed to design and develop digital hardware and firmware that will control several RADAR systems created by client.

Required Skills:

• 5 years or more of relevant design experience, hands-on radar systems design, system realization, and field testing of HF and microwave radar systems.
• Strong knowledge of VHDL/Verilog, Vivado/ISE, ISIM, EDK, System Generator, 3rd Part IP
• Developing VHDL/Verilog test benches for functional and timing simulation
• Detailed PCB design and bring up using Mentor Graphics and Altium
• Usage of Test Equipment, RF signal generators, Oscilloscopes and Logic Analyzers
• Working in Windows 7/10 and Linux environments, and TCL
• Candidate should be familiar with digital receiver design, including direct detect (i.e. RF sampling) receiver architectures
• Proficiency with MATLAB
• Candidate must have good organizational skills with the ability to complete assignments working independently and in a team environment, and effectively present results.
• Effective communication with colleagues, sponsors, and other research sites
• Radar timing and basic signal processing.
• RF converters
• Xilinx FPGA development and test in an Embedded environment
• PCB design, schematic capture, component selections, and simulation using Altium/Mentor Graphics. Evaluating design tradeoff against speed and resource utilization
• Strong knowledge and understanding of analog/digital components, ADC and DAC performances
• Experience with various hardware interfaces and communication: PCIe, I2C, LVDS, Serial Data over Fiber Optics with Protocol knowledge
• Software design and development in C/C
• Desire and ability to participate in field experiments and data collection efforts, which could involve travel.

Others:

• Clearance: Candidates must have an active secret clearance to be considered for this role.
• Travel: Estimated at 5% domestic and international
• Work Location: Hybrid - Candidates should expect to be onsite 3 days a week.
• Interview Process: Initial pre-screen with Group Leader(s). If candidate advances to next round, will be a larger group interview with technical staff.