What are the responsibilities and job description for the Senior High Speed Mixed-Signal I/O & Analog Layout Engineer position at Saige Partners?
No third parties/No C2C/W2 only
As a senior high speed mixed-signal layout/analog layout engineer, you will be working with circuit designers located in San Jose, California, USA to accomplish layout tasks. Circuits that you will need to work on includes High Speed RX (receiver), TX (transmitters), PLL, CDR, Analog reference circuits, and so on. You should have experiences doing layout with sub-micron CMOS technologies,
Responsibilities:
• Working with remote circuit designers to determine the chip floorplan. You need to come up with strategies to optimize the parasites, reduce area, and improve High Speed SERDES/analog performance.
• You need to be able to estimate schedule and come up with plan how to get things done within a dedicated time frame.
• You should be able to read the design document provided by the foundry and figure out how to resolve issues like latch-up and DRC.
• Perform custom layout using Virtuoso, and be able to get LVS/DRC clean.
• You should be familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad and so on.
• Desired to have experience on chip level design, like bump, pad, and ESD strategies.
• Good communication skills to discuss with circuit designer.
Requirements
• Bachelor’s degree in electrical or computer engineering and 5 years of professional experience as an IC layout designer; OR 8 years of professional experience with integrated circuit layout design in lieu of a degree
Preferred Skills:
• Strong High Speed SERDES/analog layout skills
• Experience in advanced nodes in IC layout, including finfet 14nm, 8nm, 4nm and 2nm GAA.
• Experience in IC layouts with frequencies up to 224Gb/s.
• Experience in critical IC layouts, including VCO, clocking circuit, TX, and RX and so on.
• Working knowledge in Linux
• Proficiency in CAD tools including Cadence Virtuoso, Calibre LVS, DRC, and SkillCad.