What are the responsibilities and job description for the Senior Design Verification-Lead position at Quest Global?
Job description
• Create testbenches in SystemVerilog with UVM
• Utilize advanced verification techniques
• Write tools and scripts to enhance the verification process
Qualifications and requirements:
- 10 years industry experience required.
- Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.
- Strong in HVL (UVM / SystemVerilog / OVM), C/C , Perl, TCL programming/scripting skills, verification methodologies and flows.
- Strong in constraint random verification, assertion writing, coverage analysis, debugging.
- Familiarity with ARM cores, formal verification, SV DPI-C is a plus.
- Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus.
- Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus.
- Must be a team player with good oral and written communication skills.
- Self-motivated with the ability to work independently and interface effectively with engineers across divisions and remote locations
