Electrical Design Verification Test (eDVT) Engineer

Position Title: Electrical Design Verification Test (EDVT) Engineer

Location: Sunnyvale, CA- 100% onsite

Length of Contract: 6 months extensions (potential for conversion)

Background check Required

Scope: 2-3 weeks to onboard, with a probable start date of early April timeframe. Looking for person can do Network Testing and DVT – especially strong in EDVT with ability to understand reading EE schematics, and strong broad knowledge of hardware in addition to networking products.

This engineer will work closely with NPI (New Product Introduction) team members, especially the hardware design, ODM hardware, software, and manufacturing engineers, to determine the product test strategy, develop the necessary scripts, test the products for compliance with some 802.3 IEEE standards and resolve any issues in order to support the successful release of new products.

Furthermore, this engineer will represent the team in interfacing with cross-functional team members at various levels to communicate test strategy, status, and mitigation plan. He / she continuously looks for ways to innovate, leverage and enhance test strategy, process, and execution.

Responsibilities:

Participate on project teams of engineers involved in specification, design, development, and test of hardware.

Assist engineers in design, development, and evaluation of new products, perform bench level repair and bring-up on engineering prototypes.

Define the design test parameters and procedures with the goal of releasing zero design defects to production.

Develop and implement system and board level test plans with hardware development engineers, diagnostics engineers, software, and project managers.

Setup complex test scenarios to maximize functional stress on hardware modules through traffic and diagnostic testing.

Identifying test equipment and test set up architectures required to test new hardware products.

Execute EDVT test plans while documenting results and debugging issues found. Drive issue to closure and get corrective action with the project team.

Perform HALT (Highly Accelerated Life Testing) at local outside labs.

Interface/engage closely with cross functional product teams to meet the project milestones, third party vendor in test equipment evaluation and training, and ODM partners to gather, evaluate and approve ODM's test strategy, plans, process, and reports.

Present status and mitigation plan to the project team when opportunity arises.

Drive the evaluation and enhancement of the testing process and best practice documentation. Improve processes and actively enhance efficiency, consistency, cost avoidance, test leverage and customer satisfaction.

Evaluate technical readiness prior to releasing to manufacturing.

Minimum Qualifications:

Minimum MSEE/CS plus 3-5 yrs. related experience or BSEE/CS plus 5-7 yrs. related experience.

Hands-on experience in testing networking L2/L3 protocols in qualifying network products.

Min. 3 years of experience in IEEE 802.3 standards related works for qualifying transceiver and RJ45 MagJack interfaces.

Familiarize with 10/100/1000, 10G, 2.5G, 5G Base-T and 1G/10G/40G/50G/100G/400G transceiver qualification