What are the responsibilities and job description for the Principal Analog Mixed Signal ASIC Layout Engineer position at Motion Recruitment Partners, LLC?
Principal Analog Mixed Signal ASIC Layout Engineer
12 month contract
No security clearance required.
Cambridge, MA - Hybrid work is acceptable; however, candidates must be able to work onsite at least once a week.
Overview
Seeking a talented and motivated individual to join the Analog Mixed Signal (AMS) ASIC team at client. The physical silicon design group is responsible for creating complex analog layouts from schematics, collaborating with other members of our exceptional team. These layouts are used in ASICs for applications in national security, biomedical, and space. While we are seeking a principal-level engineer, highly capable applicants at other levels will be considered.
A successful candidate will contribute to ASIC development through custom analog layout creation, chip floor planning, high-level problem solving, and executing tape outs. Skills in organizing and leading other layout engineers are highly valued.
Key Responsibilities
12 month contract
No security clearance required.
Cambridge, MA - Hybrid work is acceptable; however, candidates must be able to work onsite at least once a week.
Overview
Seeking a talented and motivated individual to join the Analog Mixed Signal (AMS) ASIC team at client. The physical silicon design group is responsible for creating complex analog layouts from schematics, collaborating with other members of our exceptional team. These layouts are used in ASICs for applications in national security, biomedical, and space. While we are seeking a principal-level engineer, highly capable applicants at other levels will be considered.
A successful candidate will contribute to ASIC development through custom analog layout creation, chip floor planning, high-level problem solving, and executing tape outs. Skills in organizing and leading other layout engineers are highly valued.
Key Responsibilities
- Design and simulate circuits at the transistor level to implement architecture and requirement specifications.
- Contribute to system-level design.
- Optimize hardware designs for performance, power, and cost.
- Evaluate hardware feasibility for complex algorithms and requirements.
- Independently contribute to and develop complex chip architectures and designs.
- Drive solutions to complex problems; develop requirements, propose solutions when requirements are unclear, and adapt to changing requirements.
- Contribute to business development and proposal activities.
- Develop, document, and teach best practices to less experienced engineers.
- Perform or guide physical layout, including floor-planning, circuit simulation with extracted parasitics, and contribute to design-for-test development.
- Perform other duties as assigned.
- Proficiency in integrated circuit design.
- Understanding of integrated circuits, semiconductors, and general computer architecture.
- Ability to write detailed design specifications.
- Ability to lead multi-disciplinary technical teams.
- Excellent verbal and written communication skills.
- Strong mathematical, organizational, and analytical skills.
- Effective time management with a proven ability to meet deadlines.
- Ability to prioritize tasks and demonstrate strong planning skills to achieve program goals.
- Bachelor's degree in engineering or a related field required.
- Master's degree preferred.
- Bachelor's degree: 7-10 years of relevant experience.
- Master's degree: 5-10 years of relevant experience.
- Experience in ASIC hardware engineering or a related field.
- Experience with low power circuit design.
- Experience with CMOS advanced nodes below 32nm.
- Experience with radiation-hardened electronics.
- No clearance required.
- Candidates must be able to work on-site in Cambridge (hybrid is acceptable; fully remote is not an option).