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STA Engineer

Mirafra Technologies
San Jose, CA Full Time
POSTED ON 4/4/2026
AVAILABLE BEFORE 5/2/2026

Job Description:

◦ Experience with Integration for STA: including Hyperscale and hierarchical analysis with parasitic stitching, IO budgeting, and flat parasitic extraction.

◦ Timing closure with various timing ECO including transition, setup, hold, noise, crosstalk, and power recovery.

◦ Familiarity with various on-chip variation including AOCV, POCV and voltage, temperature, aging-based timing derates

◦ Synthesis Tools: Synopsys DC/DCG/FC.

◦ Static Timing Analysis & ECO: Synopsys Primetime/PTPX/Tweaker/PrimeClosure, Cadence Tempus.

◦ Scripting: TCL, Perl, or Python.

Salary.com Estimation for STA Engineer in San Jose, CA
$132,902 to $159,369
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