Principal Digital Design Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are seeking a Principal Digital Design Engineer to lead the architecture, design, and delivery of next-generation High Bandwidth Memory (HBM) solutions. This role is a key technical leadership position within the HBM design team, responsible for driving complex digital designs from architecture definition through silicon validation and production.

The ideal candidate combines deep hands-on digital build expertise, system-level understanding of HBM architectures, and technical leadership across multi-functional teams, including architecture, verification, physical development, signal integrity, and product engineering.

Responsibilities Will Include, But Are Not Limited To

• Lead digital architecture and micro‑architecture definition for HBM subsystems, including memory controllers, PHY interfaces, command/address logic, scheduling, ECC, and reliability features.
• Drive architectural tradeoffs across performance, power, area, and reliability (PPA) for advanced HBM generations.
• Provide technical direction and design reviews for complex RTL and system-level implementations.
• Own and implement high-quality RTL (SystemVerilog) for critical HBM digital blocks.
• Ensure robust clocking, reset, low‑power, and DFT-ready design practices.
• Collaborate closely with physical design teams to ensure timing closure, CDC robustness, and power intent alignment.
• Support pre-silicon validation, emulation, and post-silicon debug and bring‑up.
• Analyze silicon results and drive corrective actions across design revisions.
  
  

Minimum Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 10 years of experience in digital IC design, with significant experience in memory or high-speed interface designs.
  
  

Strong Expertise In

• SystemVerilog RTL design
• HBM, DDR, or other high-performance memory architectures
• Clock‑domain crossing (CDC), reset strategies, and low‑power design
• Static timing analysis concepts and timing-aware RTL design
• Proven experience leading complex blocks or subsystems through successful silicon.
  
  

Preferred Qualifications

• Direct experience with HBM2 / HBM2E / HBM3 or later architectures.
  
  

Familiarity With

• Memory controller scheduling algorithms
• ECC, RAS, and reliability features
• Power management and DVFS in memory subsystems
• Experience with pre-silicon validation platforms (FPGA, emulation).
• Strong debugging skills across RTL, gate‑level, and silicon.
• Prior experience mentoring engineers or acting as a technical lead.
  
  

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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