DFT Engineer in California

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Hi,

DFT Engineer

Santa Clara, CA - Onsite/Hybrid

Longterm

Full-Time / Contract

Open to All Visa Types

Experience: 3 12 Years

Job Description

We are hiring a DFT Engineer to work on next-generation semiconductor products and advanced SoC architectures. The ideal candidate will be responsible for implementing and validating Design-for-Test methodologies to improve chip testability and manufacturing quality.

Key Responsibilities

• Develop and implement DFT architectures for complex ASIC/SoC designs
• Work on scan insertion, ATPG, MBIST, LBIST, and boundary scan implementation
• Perform fault coverage analysis and pattern generation
• Collaborate with RTL, Physical Design, and Verification teams
• Debug DFT-related issues during simulation and silicon bring-up
• Support compression techniques and low-power DFT methodologies
• Validate test structures and support post-silicon activities
• Ensure high test coverage and quality metrics for tapeout
  
  

Required Skills

• Strong understanding of DFT concepts and methodologies
• Hands-on experience with scan, ATPG, JTAG, MBIST, and compression flows
• Experience with tools such as Tessent, SpyGlass DFT, Modus, or Tetramax
• Knowledge of Verilog/SystemVerilog and simulation/debug flows
• Familiarity with semiconductor design and test processes
• Scripting experience in Tcl, Perl, or Python
  
  

Preferred Qualifications

• Experience with advanced nodes and large SoC designs
• Understanding of low-power DFT techniques
• Prior silicon debug and bring-up experience
• Excellent analytical and communication skills