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Job Title: DFx Verification Engineer (DFT / Design for Test)
Location: Santa Clarita, California (Onsite)
2 video interviews
JD:
Overview
We are seeking a DFx Verification Engineer to support validation of Design-for-Test (DFT) features across complex digital designs. This role will focus on verifying test architectures such as scan, BIST, and boundary scan using modern verification methodologies.
Key Responsibilities
Sr. IT Technical Recruiter
Stellent IT Phone:
Email: navnish
Job Title: DFx Verification Engineer (DFT / Design for Test)
Location: Santa Clarita, California (Onsite)
2 video interviews
JD:
Overview
We are seeking a DFx Verification Engineer to support validation of Design-for-Test (DFT) features across complex digital designs. This role will focus on verifying test architectures such as scan, BIST, and boundary scan using modern verification methodologies.
Key Responsibilities
- Develop and execute verification plans for DFx/DFT features, including:
- Scan (stuck-at, transition fault coverage)
- MBIST / LBIST
- Boundary Scan (JTAG)
- Memory repair and redundancy
- Low-power test scenarios
- Build and maintain SystemVerilog/UVM-based testbenches for DFx validation
- Perform verification of:
- Scan chain integrity and connectivity
- Test mode functionality and coverage
- ATPG pattern validation and debug
- BIST controllers and memory test logic
- Collaborate with design, DFT, and verification teams to ensure robust test coverage and implementation
- Strong understanding of:
- DFT concepts (Scan, ATPG, MBIST, JTAG)
- Digital design fundamentals
- Hands-on experience with:
- SystemVerilog and UVM
- Simulation tools such as VCS, Xcelium, or Questa
Sr. IT Technical Recruiter
Stellent IT Phone:
Email: navnish